A Random and an Algorithmic Technique for Fault Detection Test Generation for Sequential Circuits
- 1 November 1971
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. C-20 (11) , 1364-1370
- https://doi.org/10.1109/t-c.1971.223140
Abstract
Two procedures are presented for generating fault detection test sequences for large sequential circuits. In the adaptive random procedure one can achieve a tradeoff between test generation time, length, and percent of circuit tested. An algorithmic path-sensitizing procedure is also presented. Both procedures employ a three-valued logic system. Some experimental results are given.Keywords
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