All digital phase-locked loop: concepts, design and applications
- 1 January 1989
- journal article
- Published by Institution of Engineering and Technology (IET) in IEE Proceedings F Radar and Signal Processing
- Vol. 136 (1) , 53-56
- https://doi.org/10.1049/ip-f-2.1989.0007
Abstract
The concepts of an all digital phase-locked loop (DPLL), which contains a purely digital phase detector, loop filter and voltage-controlled oscillator, are explained. A second order DPLL is considered and analysed using the Z-transform technique. Implementation of the DPLL, based on the CMOS digital signal processor TMS 320C25, and the experimental results, are presented. Potential applications are also discussed.Keywords
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