A low-leakage VLSI CMOS/SOS process with thin epi layers

• 31 December 1983
• journal article
• Published by Elsevier in Microelectronics Journal
• Vol. 14  (6) , 5-12
• https://doi.org/10.1016/s0026-2692(83)80079-2

Abstract

Keywords

• THIN EPI
• EPI LAYERS
• CIRCUITS
• CVD
• LEAKAGE
• VLSI
• CHANNEL
• FABRICATED
• CMOS/SOS