Reliability of Aluminum-Gate Metallization in GaAs Power FETs

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Abstract
We report a failure mechanism in aluminum-gate GaAs power FETs (Fujitsu FLC-30 MA) caused by a deficient step metallization. Transistors analyzed during the course of a solid-state power amplifier manufacturing program revealed gate electromigration as a probable cause of discrepant performance. A deficiency in metallization step coverage at the gate-source crossover of these transistors, in conjunction with microcracks which were observed at the cross-over, resulted in a redirection of gate current. This increased current flow in the gate finger stripe led to early gate electromigration failures. Transistors which underwent a 200-hour, 175°C burn-in as part of the screening process were seen to exhibit this effect. A screening method based on measuring the resistance of the aluminum metallization which crosses the source stripe has been developed to quantify this problem. This parameter, which we call the bus line resistance (RB), reflects the severity of the metallization deficiency. The bus line resistance distribution was measured on transistors from three wafers having, respectively, low resistance (~1.0 Ω), medium resistance (~1.4 Ω), and high resistance (~2.0 Ω). The variability in all three distributions is approximately ±10%. This data indicates the cross-over metallization deficiency was prevalent across an entire wafer and not just some transistors on a wafer. A gate electromigration test was conducted to determine the effect of bus line resistance on time to failure. The drain and source contacts of the transistors were tied together at ground in this test. The gate was forward biased until a current density of 2×lO5A/cm2 was reached.

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