8 Gbit/s CMOS interface for parallel fibre-opticinterconnects

Abstract
The authors demonstrate an 8 Gbit/s CMOS link interface designed for use with parallel fibre-optic interconnect technology. The link interface is implemented in 0.8 µm CMOS and consists of eight data channels and one frame control channel each operating at 1 Gbit/s along with a full-speed 1 GHz clock channel. The chip also provides dual-ported FIFO buffers for interface to a host computer.

This publication has 0 references indexed in Scilit: