SC circuit for very large and accurate time constant integrators with low capacitance ratios

4 August 1988

journal article
Published by Institution of Engineering and Technology (IET) in Electronics Letters

Vol. 24 (16) , 1025-1027
https://doi.org/10.1049/el:19880698

Abstract

A switched capacitor active integrator which realises long time constant values with low capacitance ratios is presented. The basic circuit implements a parasitic-insensitive capacitive charge division, which allows for accurate control of the equivalent time constant. The offset of the operational amplifier is reduced via a correlated-double-sampling operation, and the effect of the finite gain of the operational amplifier is also reduced with respect to classic integrators when a modified topology is used.

Keywords

SWITCHED CAPACITOR ACTIVE INTEGRATOR
CAPACITANCE RATIOS
ACCURATE CONTROL
CORRELATED-DOUBLE-SAMPLING OPERATION
MODIFIED TOPOLOGY
CLASSIC INTEGRATORS
EQUIVALENT TIME CONSTANT
OPERATIONAL AMPLIFIER
FINITE GAIN
TIME CONSTANT INTEGRATORS
PARASITIC-INSENSITIVE CAPACITIVE CHARGE DIVISION

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