FFT implementation on DSP-chips-theory and practice
- 4 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- No. 15206149,p. 1503-1506
- https://doi.org/10.1109/icassp.1990.115692
Abstract
The problem of comparing different algorithms for the execution of the fast Fourier transform (FFT) is considered. Instead of counting the required arithmetic operations, the necessary number of instruction cycles for an FFT implementation on different digital signal processors (DSPs) is used as a measure. It turns out that this more practical figure of merit yields a rather different valuation of the algorithms. Furthermore, a method to halve the table size for the radix-2 twiddle factors is described. Some new FFT programs for execution on DSPs are compared with programs provided by the manufacturers.<>Keywords
This publication has 2 references indexed in Scilit:
- Multiplicative Complexity, Convolution, and the DFTPublished by Springer Nature ,1988
- On computing the split-radix FFTIEEE Transactions on Acoustics, Speech, and Signal Processing, 1986