Target-sensitive construction of diagnostic programs for procedure calling sequence generators
- 1 May 1996
- journal article
- research article
- Published by Association for Computing Machinery (ACM) in ACM SIGPLAN Notices
- Vol. 31 (5) , 249-257
- https://doi.org/10.1145/249069.231431
Abstract
Building compilers that generate correct code is difficult. In this paper we present a compiler testing technique that closes the gap between actual compiler implementations and correct compilers. Using formal specifications of procedure calling conventions, we have built a target-sensitive test suite generator that builds test cases for a specific aspect of compiler code generators: the procedure calling sequence generator. By exercising compilers with these target-specific test suites, our automated testing tool has exposed bugs in every compiler tested. These compilers include ones that have been in heavy use for many years. The detected bugs cause more than 14,000 test cases to fail.This publication has 10 references indexed in Scilit:
- Testing Finite State Machines: Fault DetectionJournal of Computer and System Sciences, 1995
- Architecture validation for processorsPublished by Association for Computing Machinery (ACM) ,1995
- A formal model and specification language for procedure calling conventionsPublished by Association for Computing Machinery (ACM) ,1995
- A code generation interface for ANSI CSoftware: Practice and Experience, 1991
- Test selection based on finite state modelsIEEE Transactions on Software Engineering, 1991
- An optimization technique for protocol conformance test generation based on UIO sequences and rural Chinese postman toursIEEE Transactions on Communications, 1991
- Formal methods for protocol testing: a detailed studyIEEE Transactions on Software Engineering, 1989
- A portable global optimizer and linkerPublished by Association for Computing Machinery (ACM) ,1988
- Fault detecting experiments for sequential circuitsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1964
- A method for synthesizing sequential circuitsBell System Technical Journal, 1955