Floating substrate effects in SOS VLSIs

Abstract
New floating substrate effects which degrade the operating speed of scaled down SOS MOS VLSIs are investigated, utilizing CMOS/SOS ring oscillators with substrate electrodes and CMOS/SOS RAMs. Reverse bias floating substrate effect due to charge pumping, which increases the propagation delay time, is more pronounced with increasing substrate impurity concentration and/or decreasing power supply voltage. This charge pumping rate is greater in PMOS than in NMOS. CMOS/SOS RAM access time degradation is caused from the noise current in deselected transfer gate transistors, due to forward bias floating substrate effect which comes from the capacitive coupling between the bit line and the substrates of deselected transfer gate transistors. The importance of introducing device structures, which fix transistor substrate potential in high-speed SOS VLSI designs, is discussed based on the above results.