Sub-80-nm contact hole patterning using Step and Flash Imprint Lithography

Abstract
Recently, the International Roadmap for Semiconductors (ITRS) has included imprint lithography on its roadmap, to be ready for production use in 2013 at the 32 nm node. Step and Flash Imprint Lithography (S-FILTM) is one of the promising new methods of imprint lithography being actively developed. Since S-FIL is a 1X printing technique, fabrication of templates is especially critical. S-FIL has previously demonstrated the ability to reliably print high resolution line/space and contact hole features into a silicon-rich etch barrier material. Beyond printing with S-FIL however, there is the requirement to develop low or zero bias, high selectivity dry etch processes needed to transfer printed images into the substrate. In this study, the feasibility and methodology of imprinting sub-80 nm contacts, and pattern transferring this image into an underlying oxide layer is demonstrated. Critical parameters such as e-beam dose and etch biases associated with template pillar fabrication, and biases associated with pattern transfer processes for sub-80 nm 1:1 and 1:2 pitch contacts are discussed. Wafer imprinting was done on 200 mm wafers using Molecular Imprints Inc., Imprio 100TM system.

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