Role of defects in determining the electrical properties of CdS thin films. II. Stacking faults

Abstract
A correlation of the electrical properties of slowly depositedcadmium sulphide thin films with electronic scattering from stacking faults is presented. Electron diffraction studies indicate that the stacking‐fault density depends critically on substrate temperature. ``Cross‐plane'' resistivity—film temperature data indicate the stacking‐fault barrier potential to be 0.035 eV for these films. Hall investigations were also performed on misoriented‐crystallite films and, in this case, stacking faults have a significant effect on the ``in‐plane'' mobility. An empirical model, which includes the effects of stacking faults along with those of grain‐boundary and surface scattering, has been developed to demonstrate these combined scattering effects.

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