Strained-layer relaxation in fcc structures via the generation of partial dislocations

Abstract
A new strain-relief mechanism in strained III-V semiconductor structures is identified. The signature defect of the proposed mechanism is a microtwin along the {111} plane spanning an embedded strained layer. This defect can form when two partial dislocations with antiparallel Burgers vectors of the 1/6〈112〉 type are generated inside the strained layer and glide to the opposite interfaces, leaving a stacking fault between them. This is a low-energy strain-relaxation channel and poses fundamental limitations for strained-layer device structures.