High speed logic operations of all refractory Josephson integrated circuits

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Abstract
A chain circuit of four-junction logic gates consisting of all refractory junctions with niobium nitride (NbN)-niobium (Nb) double-layered electrodes has been fabricated with a 2.5-μm minimum feature. A reactive ion etching technique has been used for patterning every layer such as junction electrodes, molybdenum resistors, and insulation layers. The minimum logic delay of 18 ps/gate has been obtained in the experimental circuit.