The Maximum Rate Accumulator
- 1 August 1966
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electronic Computers
- Vol. EC-15 (4) , 628-639
- https://doi.org/10.1109/PGEC.1966.264386
Abstract
This paper concerns the application of a result of Arden and Arthurs to a particular finite-state machine, the accumulator. Arden and Arthurs have shown that given a complete set of devices for some fixed sequence rate, any finite-state machine may be constructed from these devices to operate at this maximum rate. In this paper we consider the construction of a good representation (in terms of overall delay) of the m-bit accumulator, operating at the maximum rate. Examples are presented using state-of-the-art devices which illustrate the construction and give measures of usefulness and cost Of this accumulator.Keywords
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