Automated Design of Multiple-Valued Logic Circuits by Automatic Theorem Proving Techniques

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Abstract
This paper describes a method for the automatic synthesis of multiple-valued combinational logic circuits using automatic theorem proving techniques. Logic design of multiple-valued circuits is considerably more complex than binary design because of the associated combinatorial explosion. Two general approaches which can be taken in axiomatizing the environment of combinational logic design in multiple-valued logic have been investigated. These axiomatizations, formulated in the language of first order logic, are used to state the problem of combinational logic design as a theorem proving problem. This formulation together with a representation of the function being designed can be used as input to an automatic theorem proving program. The circuit design can then be obtained from the proof generated by the theorem prover.

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