Design of a non‐blocking shared‐memory copy network for ATM
- 1 January 1993
- journal article
- research article
- Published by Wiley in International Journal of Communication Systems
- Vol. 6 (1) , 39-48
- https://doi.org/10.1002/dac.4510060106
Abstract
The design of a copy network is presented for use in an ATM (asynchronous transfer mode) switch supporting BISDN (broadband integrated services digital network) traffic. Inherent traffic characteristics of BISDN services require ATM switches to handle bursty traffic with multicast connections. In typical ATM switch designs a copy network is used to replicate multicast cells before being forwarded to a point‐to‐point routeing network. In such designs, a single multicast cell enters the switch and is replicated once for each multicast connection. Each copy is forwarded to the routeing network with a unique destination address and is routed to the appropriate output port. Non‐blocking copy networks permit multiple cells to be multicasted at once, up to the number of outputs of the copy network. Another critical feature of ATM switch design is the location of buffers for the temporary storage of transmitted cells. Buffering is required when multiple cells require a common switch resource for transmission. Typically, one cell is granted the resource and is transmitted while the remaining cells are buffered. Current switch designs associate discrete buffers with individual switch resources. Discrete buffering is not efficient for bursty traffic as traffic bursts can overflow individual switch buffers and result in dropped cells, while other buffers are under‐used. A new non‐blocking copy network is presented in this paper with a shared‐memory input buffer. Blocked cells from any switch input are stored in a single shared input buffer. The copy network consists of three banyan networks and shared‐memory queues. The design is scalable for large numbers of inputs due to low hardware complexity, O (Nlog2N), and distributed operation and control. It is shown in a simulation study that a switch incorporating the shared‐memory copy network has increased throughput and lower buffer requirements to maintain low packet loss probability when compared to a switch with a discrete buffer copy network.Keywords
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