Worst-case execution time analysis for dynamic branch predictors
- 12 November 2004
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 18, 215-222
- https://doi.org/10.1109/emrts.2004.1311023
Abstract
No abstract availableKeywords
This publication has 7 references indexed in Scilit:
- A Comparison Of Dynamic Branch Predictors That Use Two Levels Of Branch HistoryPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- Bounding loop iterations for timing analysisPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- SimpleScalar: an infrastructure for computer system modelingComputer, 2002
- Timing analysis of embedded software for speculative processorsPublished by Association for Computing Machinery (ACM) ,2002
- Worst Case Execution Time Analysis for a Processor with Branch PredictionReal-Time Systems, 2000
- A study of branch prediction strategiesPublished by Association for Computing Machinery (ACM) ,1998
- Reasoning about time in higher-level language softwareIEEE Transactions on Software Engineering, 1989