Extracting simple but accurate RC models for VLSI interconnect
- 6 January 2003
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 2351-2354
- https://doi.org/10.1109/iscas.1988.15415
Abstract
This paper describes a new,method,to find RC models,for (non- orthogonal) interconnections in VLSI layouts, including resistances as well as ground and coupling capacitances. The method,starts with the construction of a finite element mesh for theKeywords
This publication has 5 references indexed in Scilit:
- SPIDER -- A CAD System for Modeling VLSI Metallization PatternsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1987
- VLSI circuit reconstruction from mask topologyIntegration, 1984
- EXCL: A Circuit Extractor for IC DesignsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1984
- Symbolic Parasitic Extractor for Circuit Simulation (SPECS)Published by Institute of Electrical and Electronics Engineers (IEEE) ,1983
- The Transient Response of Damped Linear Networks with Particular Regard to Wideband AmplifiersJournal of Applied Physics, 1948