The Use of Analog Techniques in Binary Arithmetic Units
- 1 February 1965
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electronic Computers
- Vol. EC-14 (1) , 29-35
- https://doi.org/10.1109/PGEC.1965.264051
Abstract
A new computing element is described in which binary numbers are added by means of analog techniques. It is shown that when this element, which will be called a quantiser, is used, the design of arithmetic units for digital computers is considerably simplified. In particular, it is possible to build simple parallel adders and multipliers which do not require any external programming and which may be directly interconnected to form networks to carry out specific calculations. As these arithmetic units are self-contained the computing network may have any number of interconnected parallel paths, and so may simultaneously test many alternative hypotheses at any step in the computation. Experimental quantisers and methods of interconnecting them to form arithmetic units are described. Speed of operation and factors likely to limit performance are discussed.Keywords
This publication has 4 references indexed in Scilit:
- High-Speed Arithmetic in Binary ComputersProceedings of the IRE, 1961
- The Arithmetic Element of the IBM Type 701 ComputerProceedings of the IRE, 1953
- Coding by Feedback MethodsProceedings of the IRE, 1953
- The ORDVACPublished by Association for Computing Machinery (ACM) ,1951