Focal-plane analog VLSI cellular implementation of the boundary contour system
- 1 January 1999
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Circuits and Systems I: Regular Papers
- Vol. 46 (2) , 327-334
- https://doi.org/10.1109/81.747215
Abstract
No abstract availableKeywords
This publication has 15 references indexed in Scilit:
- A gesture controlled human interface using an artificial retina chipPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Image edge enhancement, dynamic compression and noise suppression using analog circuit processingPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A Neural Model of Contour Integration in the Primary Visual CortexNeural Computation, 1998
- Reactive components for pseudo-resistive networksElectronics Letters, 1997
- A 0.8-μm CMOS two-dimensional programmable mixed-signal focal-plane array processor with on-chip binary imaging and instructions storageIEEE Journal of Solid-State Circuits, 1997
- An integrated cortical layer for orientation enhancementIEEE Journal of Solid-State Circuits, 1997
- A retinomorphic vision systemIEEE Micro, 1996
- Synthetic aperture radar processing by a multiple scale neural system for boundary and surface representationNeural Networks, 1995
- The CNN universal machine: an analogic array computerIEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 1993
- A Two-Dimensional Analog VLSI Circuit for Detecting Discontinuities in Early VisionScience, 1990