Design of nonlinear analog switched-capacitor circuits using building blocks
- 1 April 1984
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Circuits and Systems
- Vol. 31 (4) , 354-368
- https://doi.org/10.1109/tcs.1984.1085521
Abstract
No abstract availableKeywords
This publication has 11 references indexed in Scilit:
- A voltage-controlled switched-capacitor relaxation oscillatorIEEE Journal of Solid-State Circuits, 1981
- Switched-capacitor building blocks for adaptive systemsIEEE Transactions on Circuits and Systems, 1981
- Performance of integrated dynamic MOS amplifiersElectronics Letters, 1981
- Dynamic CMOS amplifiersIEEE Journal of Solid-State Circuits, 1980
- An NMOS analog building block for telecommunication applicationsIEEE Transactions on Circuits and Systems, 1980
- Micropower switched-capacitor oscillatorIEEE Journal of Solid-State Circuits, 1979
- A monolithic phase-locked loop with post detection processorIEEE Journal of Solid-State Circuits, 1979
- A Per-Channel A/D Converter Having 15-Segment µ-255 CompandingIEEE Transactions on Communications, 1976
- A Use of Limit Cycle Oscillations to Obtain Robust Analog-to-Digital ConvertersIEEE Transactions on Communications, 1974
- A stable second-generation phase-locked loopPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1972