Polymorphic processor arrays

Abstract
Polymorphic processor arrays (PPAs), two-dimensional mesh-connected arrays of processors in which each processor is equipped with a switch able to interconnect its four NEWS ports, are discussed. The main features of PPA are that it models a realistic class of parallel computers, it supports the definition of high level programming models, it supports virtual parallelism, and it supports low complexity algorithms in a number of application fields. Both the PPA computation model and the PPA programming model are presented. It is shown that the PPA computation model is realistic by relating it to the design of the polymorphic torus (PT) chip. It is also shown that the PPA programming model is scalable by demonstrating that any algorithm having O(p) complexity on a virtual PPA of size √m×√m, has O(k p) complexity on a PPA of size √n×√n, with m k n and k integers. Some application algorithms in the area of numerical analysis and graph processing are presented

This publication has 11 references indexed in Scilit: