An Analog-Oriented Routing Tool for CMOS Analog Integrated Circuits

Abstract
The performance of analog ICs strongly depends on layout characteristics. After identifying the various categories of placement and routing constraints, this paper describes a routing strategy dedicated to take into account those specific analog features. Working in close coordination with an analog placement tool, the new routing tool uses global and local routing techniques that can handle the various constraints. It uses intelligent path scheduling and multi-constrained path minimization with electrical extraction capabilities. The selection of some routing options can be controlled by an expert system. The aim of the router is to be as close as possible to a designer's routing style. Results of automated analog layouts are presented.

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