DPCNN: a modular chip for large CNN arrays
- 1 January 1995
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 1, 417-420
- https://doi.org/10.1109/iscas.1995.521539
Abstract
The VLSI implementation of Cellular Neural Networks is a relevant task which is very important for the future development of neural networks. In this paper a a modular VLSI implementation of a 3×3 Digitally Programmable Cellular Neural Networks is presented. This chip is the first successfully tested fully programmable Cellular Neural Network hardware implementation. It covers most of the available one-neighborhood templates for image processing applications. Moreover, it has been designed to be easily interconnected to others to give very large CNN arrayKeywords
This publication has 5 references indexed in Scilit:
- Digitally programmable transconductance amplifierfor CNN applicationsElectronics Letters, 1994
- High performance digitally programmable CNN chip with discrete templatesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1994
- Very efficient VLSI implementation of CNN with discrete templatesElectronics Letters, 1993
- A CNN chip for connected component detectionIEEE Transactions on Circuits and Systems, 1991
- Cellular neural networks: theoryIEEE Transactions on Circuits and Systems, 1988