The impact of extrinsic cache performance on predictability of real-time systems
- 19 November 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
Cache memories are commonly avoided in real-time systems because of their unpredictable behavior. Recently, some research has been done to obtain tighter bounds on the worst case execution time of cached programs. These techniques usually assume a non preemptive underlying system. However, some techniques can be applied to allow the use of caches in preemptive systems. This paper compares methods for dealing with extrinsic cache behavior (inter-task cache interference). Time-domain oriented methods (the inter-task cache interference is incorporated in the schedulability analysis) are compared to space-domain oriented ones (increase of the cache predictability by assigning private cache partitions to tasks). The obtained results bound the applicability domain for each method for a variety of hardware and workload configurations. The results can be used as design guidelines.Keywords
This publication has 24 references indexed in Scilit:
- SMART (strategic memory allocation for real-time) cache designPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Process dependent static cache partitioning for real-time systemsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Hartstone Uniprocessor Benchmark: Definitions and experiments for real-time systemsReal-Time Systems, 1992
- A model of workloads and its use in miss-rate prediction for fully associative cachesIEEE Transactions on Computers, 1992
- Allocating Smart Cache Segments for SchedulabilityPublished by Springer Nature ,1991
- SMART (strategic memory allocation for real-time) cache design using the MIPS R3000Published by Institute of Electrical and Electronics Engineers (IEEE) ,1990
- On the fractal dimension of computer programs and its application to the prediction of the cache miss ratioIEEE Transactions on Computers, 1989
- Footprints in the cacheACM Transactions on Computer Systems, 1987
- Line (Block) Size Choice for CPU Cache MemoriesIEEE Transactions on Computers, 1987
- Scheduling Algorithms for Multiprogramming in a Hard-Real-Time EnvironmentJournal of the ACM, 1973