Modelling and simulation of design errors

Publisher Website

2 January 2003

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

https://doi.org/10.1109/iccd.1992.276310

Abstract

No abstract available

Keywords

This publication has 2 references indexed in Scilit:

New design error modeling and metrics for design validation
Published by Institute of Electrical and Electronics Engineers (IEEE) ,2003
Digital Logic Simulation in a Time-Based, Table-Driven Environment
Computer, 1975