Modelling of write/erase and charge retention characteristics of floating gate EEPROM devices
- 1 October 1984
- journal article
- Published by Elsevier in Solid-State Electronics
- Vol. 27 (10) , 899-906
- https://doi.org/10.1016/0038-1101(84)90009-1
Abstract
No abstract availableThis publication has 3 references indexed in Scilit:
- Electrical conduction and breakdown in oxides of polycrystalline silicon and their correlation with interface textureJournal of Applied Physics, 1982
- Charge retention of floating-gate transistors under applied bias conditionsIEEE Transactions on Electron Devices, 1980
- Fowler-Nordheim Tunneling into Thermally Grown SiO2Journal of Applied Physics, 1969