Razor: a low-power pipeline based on circuit-level timing speculation
Top Cited Papers
- 25 May 2004
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableThis publication has 16 references indexed in Scilit:
- Hardware self-tuning and circuit performance monitoringPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Automatically characterizing large scale program behaviorPublished by Association for Computing Machinery (ACM) ,2002
- Closed-loop adaptive voltage scaling controller for standard-cell ASICsPublished by Association for Computing Machinery (ACM) ,2002
- Power: a first-class architectural design constraintComputer, 2001
- A dynamic voltage scaled microprocessor systemPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2000
- Digital Systems EngineeringPublished by Cambridge University Press (CUP) ,1998
- The simulation and evaluation of dynamic voltage scaling algorithmsPublished by Association for Computing Machinery (ACM) ,1998
- Supply and threshold voltage scaling for low power CMOSIEEE Journal of Solid-State Circuits, 1997
- Asynchronous design methodologies: an overviewProceedings of the IEEE, 1995
- The counterflow pipeline processor architectureIEEE Design & Test of Computers, 1994