Improved three-step de-embedding method to accurately account for the influence of pad parasitics in silicon on-wafer RF test-structures
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- 1 April 2001
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 48 (4) , 737-742
- https://doi.org/10.1109/16.915712
Abstract
In order to model the RF behavior of a device-under-test (DUT), e.g., active and passive devices, dedicated on-wafer test-structures are required. However, parasitic components in the test-structure stemming from the contact pads, the metal interconnections and the silicon substrate, largely influence the RF behavior of the actual DUT. They need to be subtracted from the measurement results if one wants to model the RF behavior of the actual DUT accurately. This subtraction procedure is referred to as de-embedding. In this paper, we propose an improved three-step de-embedding method to subtract the influence of parasitics. The de-embedding method has been applied not only to S-parameter measurement results on MOSFETs but also, for the first time, to large-signal vectorial RF measurements.Keywords
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