Integration of medium-throughput signal processing algorithms on flexible instruction-set architectures

This publication has 25 references indexed in Scilit:

• Combined scheduling and data routing for programmable ASIC systems
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2003
• PHIDEO: a silicon compiler for high speed algorithms
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• Automated generation of DSP program development tools using a machine description formalism
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,1993
• Fast prototyping of datapath-intensive architectures
  IEEE Design & Test of Computers, 1991
• The effect of the hardware sharing factor on the selection of an architectural style for real-time signal processing
  Annals of Telecommunications, 1991
• Architecture-driven synthesis techniques for VLSI implementation of DSP algorithms
  Proceedings of the IEEE, 1990
• The high-level synthesis of digital systems
  Proceedings of the IEEE, 1990
• Verification of hardware descriptions by retargetable code generation
  Published by Association for Computing Machinery (ACM) ,1989
• Retargetable Compiler Code Generation
  ACM Computing Surveys, 1982
• Phase coupling and constant generation in an optimizing microcode compiler
  ACM SIGMICRO Newsletter, 1982