An Analytical Method for Predicting CMOS SRAM Upsets with Application to Asymmetrical Memory Cells
- 1 January 1986
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Nuclear Science
- Vol. 33 (6) , 1637-1641
- https://doi.org/10.1109/tns.1986.4334655
Abstract
An analytical method was developed to predict the heavy-ion-induced upset rate of static random access memory (SRAM) cells. The method was applied to the design of a memory with asymmetrical cells where the goal was to increase the upset rate in order to increase the number of observed upsets in a space environment. The asymmetry is achieved by increasing the drain area of selected transistors in the cell. Results from the analytical model for a space environment indicate the upset rate for the experimental asymmetrical cell (17.2 upsets/l kbit-year) will be 4.7 times larger than the upset rate for the minimum-geometry balanced cell (3.6 upsets/ 1 kbit-year). The asymmetrical SRAM was designed into a test chip intended for the Combined Release and Radiation Effects Satellite (CRRES).Keywords
This publication has 6 references indexed in Scilit:
- Parameter Extraction from Spaceborne MOSFETsIEEE Transactions on Nuclear Science, 1985
- Analytic Expressions for the Critical Charge in CMOS Static RAM CellsIEEE Transactions on Nuclear Science, 1983
- Suggested Single Event Upset Figure of MeritIEEE Transactions on Nuclear Science, 1983
- Alpha-particle-induced field and enhanced collection of carriersIEEE Electron Device Letters, 1982
- A design of CMOS polycell for LSI circuitsIEEE Transactions on Circuits and Systems, 1981
- The Simulation of MOS Integrated Circuits Using SPICE2Published by Defense Technical Information Center (DTIC) ,1980