Current path optimized structure for high drain current density and high gate-turn-on voltage enhancement mode heterostructure field effect transistors
- 27 November 2002
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
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This publication has 4 references indexed in Scilit:
- A high efficiency complementary GaAs power FET technology for single supply portable applicationsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Device and process optimization for a low voltage enhancement mode power heterojunction FET for portable applicationsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A true enhancement mode single supply power HFET for portable applicationsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- An E-mode GaAs FET power amplifier MMIC for GSM phonesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002