A 150-V multiple up-drain VDMOS, CMOS, and bipolar process in 'direct-bonded' silicon on insulator on silicon
- 1 September 1992
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 13 (9) , 460-461
- https://doi.org/10.1109/55.192794
Abstract
Silicon on insulator on silicon (SOIS) has been produced with silicon direct bonding (SDB). Within a silicon film of 15- mu m thickness, islands with ubiquitous oxide isolation have been formed for the simultaneous integration of 150-V power VDMOS transistors, CMOS circuits in a channelless sea-of-gates array with 2- mu m gates, and bipolar transistors. The up-drain VDMOS transistors with 2- Omega -mm/sup 2/ specific on-resistance allow multiple isolated outputs, so high-voltage push-pull drivers can be fabricated in a single chip. The bipolar transistors are comparable to those of a 60-V standard process with vertical n-p-n and lateral p-n-p current gains of 80.Keywords
This publication has 4 references indexed in Scilit:
- A 100-V lateral DMOS transistor with a 0.3-micrometer channel in a 1-micrometer silicon-film-on-insulator-on-siliconIEEE Transactions on Electron Devices, 1991
- An overview of smart power technologyIEEE Transactions on Electron Devices, 1991
- Silicon‐on‐Insulator Films Obtained by Etchback of Bonded WafersJournal of the Electrochemical Society, 1989
- Wafer bonding for silicon-on-insulator technologiesApplied Physics Letters, 1986