SYCLOP: synthesis of CMOS logic for low power applications
- 2 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 464-467
- https://doi.org/10.1109/iccd.1992.276316
Abstract
A system called SYCLOP that synthesizes finite-state machines (FSMs) and combinational logic for low-power applications is presented. SYCLOP tries to minimize the area and the transition density at the internal nodes of a CMOS circuit. The minimization is based on the input signal probabilities and the transition densities. Using this system, a particular circuit can be optimally synthesized for different applications. Results have been obtained for a wide range of benchmark examples.Keywords
This publication has 8 references indexed in Scilit:
- Synthesis of combinational logic circuits for path delay fault testabilityPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Technologies for personal communicationsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1991
- Transition density, a stochastic measure of activity in digital circuitsPublished by Association for Computing Machinery (ACM) ,1991
- MUSTANG: state assignment of finite state machines targeting multilevel logic implementationsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1988
- MIS: A Multiple-Level Logic Optimization SystemIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1987
- Measurement and modeling of computer reliability as affected by system activityACM Transactions on Computer Systems, 1986
- On Random Pattern Test LengthIEEE Transactions on Computers, 1984
- Probabilistic Treatment of General Combinational NetworksIEEE Transactions on Computers, 1975