A 16-DIP 64Kb static MOS RAM

1 January 1981

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

Vol. XXIV, 16-17
https://doi.org/10.1109/isscc.1981.1156221

Abstract

A 64K×1b fully static MOS RAM using 1.5μm design rules will be described. The device has multiplexed addressing and is assembled in a standard 300-mil 16-pin DIP.

Keywords

CIRCUITS
DECODING
READ-WRITE MEMORY
POWER DISSIPATION
INVERTERS
ELECTRONICS PACKAGING
CLOCKS
LITHOGRAPHY
VOLTAGE
DRAM CHIPS

This publication has 2 references indexed in Scilit:

A 256K bit dynamic RAM
IEEE Journal of Solid-State Circuits, 1980
A 64Kb static RAM
Published by Institute of Electrical and Electronics Engineers (IEEE) ,1980