ASIC design using the high-level synthesis system CALLAS: a case study
- 4 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 18, 141-146
- https://doi.org/10.1109/iccd.1990.130185
Abstract
The Siemens high-level synthesis system CALLAS was used to synthesize an ASIC for moving-object detection consisting of 3400 equivalent gates. The digital signal processing (DSP) problem was formulated on algorithmic level in the hardware description language DSDL as a three-page algorithm. Only a few days were needed from specification to the chip layout. Design steps included were high-level behavior simulation, library mapping, and standard cell layout generation using a state-of-the-art physical design system. The authors give a brief overview of the CALLAS system, introduce the DSP example, and discuss the synthesis process and the simulations performed.Keywords
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