Abstract BDDs: A Technique for Using Abstraction in Model Checking
- 1 January 1999
- book chapter
- Published by Springer Nature
- p. 172-187
- https://doi.org/10.1007/3-540-48153-2_14
Abstract
No abstract availableKeywords
This publication has 11 references indexed in Scilit:
- Symmetry and model checkingFormal Methods in System Design, 1996
- Exploiting symmetry in temporal logic model checkingFormal Methods in System Design, 1996
- Using partial-order methods in the formal validation of industrial concurrent programsPublished by Association for Computing Machinery (ACM) ,1996
- Modular verification of multipliersPublished by Springer Nature ,1996
- Verification of the Futurebus+ cache coherence protocolFormal Methods in System Design, 1995
- Residue BDD and its application to the verification of arithmetic circuitsPublished by Association for Computing Machinery (ACM) ,1995
- Symbolic model checking for sequential circuit verificationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1994
- Symbolic Model CheckingPublished by Springer Nature ,1993
- Graph-Based Algorithms for Boolean Function ManipulationIEEE Transactions on Computers, 1986
- Automatic verification of finite state concurrent system using temporal logic specificationsPublished by Association for Computing Machinery (ACM) ,1983