Performance modeling of a cache system with three interconnect technologies: cyanate ester PCB, chip-on-board and Cu/PI MCM

Publisher Website

2 January 2003

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

https://doi.org/10.1109/mcmc.1992.201467

Abstract

No abstract available

Keywords

This publication has 1 reference indexed in Scilit:

CMOS multichip module test vehicle with TAB'd components
Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002