A matrix product accelerator for field programmable systems on chip
- 1 March 2008
- journal article
- Published by Elsevier in Microprocessors and Microsystems
- Vol. 32 (2) , 53-67
- https://doi.org/10.1016/j.micpro.2007.05.002
Abstract
No abstract availableThis publication has 5 references indexed in Scilit:
- H-SIMD machine: configurable parallel computing for matrix multiplicationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2006
- Accelerating matrix product on reconfigurable hardware for image processing applicationsIEE Proceedings - Circuits, Devices and Systems, 2005
- Partially reconfigurable matrix multiplication for area and time efficiency on FPGAsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2004
- Energy advantages of microprocessor platforms with on-chip configurable logicIEEE Design & Test of Computers, 2002
- Accelerating Matrix Product on Reconfigurable Hardware for Signal ProcessingPublished by Springer Nature ,2001