A dense gate matrix layout style for MOS LSI

Publisher Website

1 January 1980

proceedings article
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 212-213
https://doi.org/10.1109/isscc.1980.1156074

Abstract

No abstract available

Keywords

This publication has 3 references indexed in Scilit:

Versatile Mask Generation Techniques for Custom Microelectronic Devices
Published by Institute of Electrical and Electronics Engineers (IEEE) ,1978
Block and track method for automated layout generation of MOS-LSI arrays
Published by Institute of Electrical and Electronics Engineers (IEEE) ,1972
Large Scale Integration of MOS Complex Logic: A Layout Method
IEEE Journal of Solid-State Circuits, 1967