Design of 1.28-GB/s high bandwidth 2-Mb SRAM for integrated memory array processor applications
- 1 June 1995
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 30 (6) , 637-643
- https://doi.org/10.1109/4.387066
Abstract
No abstract availableKeywords
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- IMAP: INTEGRATED MEMORY ARRAY PROCESSORJournal of Circuits, Systems and Computers, 1992