TFSOI BiCMOS technology for low power applications
- 30 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 449-452
- https://doi.org/10.1109/iedm.1993.347313
Abstract
A thin film silicon on insulator BiCMOS technology has been developed for low power applications. The technology is based on a manufacturable, near-fully-depleted 0.5 /spl mu/m CMOS process with the lateral bipolar device integrated as a drop-in module for BiCMOS circuits. The bipolar device structure emphasizes use of a silicided polysilicon base contact to reduce base resistance and minimize current crowding effects. A split-oxide spacer integration is used to define the bipolar base and emitter widths independently. Low current ECL gate speeds up to 2/spl times/ faster than bulk double-polysilicon self-aligned bipolar circuits have been demonstrated.<>Keywords
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