Dipole layers at the metal-SiO2 interface

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Abstract
The existence of dipole layers at the metal‐insulator interface or dipole layers in the bulk of the insulator can play an important role in determining electrical conduction and dielectric loss in insulators, and the nature of the barrier to electron injection into the insulator. The conventional analysis of metal‐SiO2‐semiconductor (MOS) structures is extended to include the effect of dipoles on capacitance‐voltage (C‐V) characteristics. The occurrence of both dipole layers and trapped charge can be established by measuring the flat‐band voltage of MOS capacitors as a function of oxide thickness. Such measurements are suitable for measuring changes in the work function at the metal‐insulator interface due to metal‐insulator reaction. C‐V measurements of Au‐SiO2‐Si capacitors are combined with thermally stimulated ionic conductivity (TSIC) measurements of Na+ in SiO2 to show that annealing of the Au‐SiO2 interface between 150° and 250 °C produces a positive dipole at the Au‐SiO2 contact while annealing between 250° and 400 °C results in a negative dipole at the Au‐SiO2 interface as well as introducing negative charge into the insulator. C‐V measurements give the magnitude of work function changes while TSIC measurements show that the changes occur at the Au‐SiO2 interface. Annealing the Al‐SiO2 interface at 400 °C in nitrogen or forming gas produces a dipole layer that increases the Al‐SiO2 barrier height by about 0.2 eV. The work function at the metal‐insulator interface is not a well‐defined constant but depends on metal‐insulator interactions that depend, in turn, on processing of the interface.