Fabrication of a Nanometer-Scale Si-Wire by Micromachining of a Silicon-on-Insulator Substrate
- 1 December 1998
- journal article
- Published by IOP Publishing in Japanese Journal of Applied Physics
- Vol. 37 (12S)
- https://doi.org/10.1143/jjap.37.7182
Abstract
Air-bridge-structured Si wires were fabricated by using a silicon-on-insulator (SOI) substrate and electrically characterized. The SOI substrate used had a sandwich structure of a 200-nm-thick p-type Si layer (SOI layer), a 400-nm-thick buried oxide layer (BOX layer) and a p-type Si substrate. The wires were made by conventional photolithography process followed by dry etching and thermal oxidation thinning of the SOI layer. The Si wires were isolated from the substrate by an air gap made in the BOX layer and had dimensions of typically 20 nm in width, 40 nm in height and 150 nm in length. It was found from the measurements of current-voltage characteristics that the current through the wires much increased by illumination with a He-Ne laser and reached about 20 nA at a bias of 1 V.Keywords
This publication has 3 references indexed in Scilit:
- Si single electron tunneling transistor with nanoscale floating dot stacked on a Coulomb island by self-aligned processApplied Physics Letters, 1997
- Time-resolved measurement of single-electron tunneling in a Si single-electron transistor with satellite Si islandsApplied Physics Letters, 1995
- Adsorbate effects on photoluminescence and electrical conductivity of porous siliconApplied Physics Letters, 1994