Advocating Noise as an Agent for Ultra-Low Energy Computing: Probabilistic Complementary Metal–Oxide–Semiconductor Devices and Their Characteristics
- 1 April 2006
- journal article
- Published by IOP Publishing in Japanese Journal of Applied Physics
- Vol. 45 (4S) , 3307
- https://doi.org/10.1143/jjap.45.3307
Abstract
Noise immunity and low-energy computing have become limiting factors in the semiconductor roadmap as transistor feature sizes shrink. The subject of our study is the probabilistic switch, implemented in the complementary metal–oxide–semiconductor (CMOS) domain, referred to as a probabilistic CMOS (PCMOS) switch, whose behavior is rendered probabilistic by noise. In conducting this study, we are motivated by the possibility of using such probabilistic switches to realize ultra-low energy computing. Based on PCMOS switches realized using 0.5 and 0.25 µm processes, we present detailed analytical models, subsequently verified through HSpice simulations. We consider the thermal noise and power supply noise as our sources for probabilistic behavior. Through one interesting aspect of the study, we characterize the effects of the noise sampling frequency and the output sampling frequency on probabilistic behavior. Finally, we briefly outline the opportunity that such probabilistic switches offer to ultra low-energy computing through the concept of a probabilistic system-on-a-chip (PSoC) architecture (that is based on PCMOS switches); such architectures can achieve significant energy savings and performance improvements at the application level.Keywords
This publication has 9 references indexed in Scilit:
- Energy Aware Computing through Probabilistic Switching: A Study of LimitsIEEE Transactions on Computers, 2005
- End of Moore's law: thermal (noise) death of integration in micro and nano electronicsPhysics Letters A, 2002
- Toward achieving energy efficiency in presence of deep submicron noiseIEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2000
- Analysis and future trend of short-circuit powerIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2000
- Short-circuit energy dissipation modeling for submicrometer CMOS gatesIEEE Transactions on Circuits and Systems I: Regular Papers, 2000
- Scaling limit of digital circuits due to thermal noiseJournal of Applied Physics, 1998
- Supply and threshold voltage scaling for low power CMOSIEEE Journal of Solid-State Circuits, 1997
- Randomized AlgorithmsPublished by Cambridge University Press (CUP) ,1995
- Noise-induced error rate as limiting factory for energy per operation in digital ICsIEEE Journal of Solid-State Circuits, 1977