Formal Modeling and Validation Applied to a Commercial Coherent Bus: A Case Study
- 1 January 1997
- book chapter
- Published by Springer Nature
Abstract
No abstract availableKeywords
This publication has 4 references indexed in Scilit:
- Verification of Large Systems in SiliconPublished by Springer Nature ,1997
- A formal proof of absence of deadlock for any acyclic network of PCI busesPublished by Springer Nature ,1997
- Verifying the summit bus converter protocols with symbolic model checkingFormal Methods in System Design, 1994
- Symbolic Model CheckingPublished by Springer Nature ,1993