Feasibility study of VLSI device layer transfer by CMP PETEOS direct bonding
- 24 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
Reports here the first results of using plasma enhanced CVD TEOS (Si(C/sub 2/H/sub 5/O)/sub 4/) oxide (PETEOS) and associated CMP (Chemical Mechanical Polishing) technology to form a flat layer on the surface of a processed VLSI bulk Si wafer for direct bonding. The undoped PETEOS oxide has also been used as a bonding layer for substrates onto which the IC layer is to be transfered and whose surfaces are not favorable for bonding.Keywords
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