Sub-quarter micron Si-gate CMOS with ZrO/sub 2/ gate dielectric
- 13 November 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 204-207
- https://doi.org/10.1109/vtsa.2001.934520
Abstract
MOSFETs with a zirconium dioxide (ZrO/sub 2/) gate dielectric and poly-silicon gate were fabricated using a low temperature CMOS process. Well-behaved transistor characteristics were obtained for devices with sizes of 14 /spl mu/m/spl times/1.4 /spl mu/m or smaller. Devices 14 /spl mu/m/spl times/14 /spl mu/m or larger were found to be nonfunctional due to the formation of Zr-silicide at the polySi-gate/Zr0/sub 2/ interface. In this paper, we present results on the electrical and physical characterization.Keywords
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