A monolithically-integrated chip-to-chip optical link in bulk CMOS
- 1 June 2014
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- No. 21585601,p. 1-2
- https://doi.org/10.1109/vlsic.2014.6858377
Abstract
A silicon-photonic link is monolithically-integrated in a bulk CMOS process for the first time. Deep-trench isolation enables polySi waveguide integration. PolySi resonant detectors remove the need for Ge integration. Split-diode design enables half-rate receivers, mitigating transistor speed limitations. An on-chip feedback loop locks the resonant defect detector to the laser wavelength, combating thermal upset. The 5 m optical link achieves 5 Gb/s at 3 pJ/b electrical and 13 pJ/b optical energy, in 0.18 μm (100 ps FO4) bulk CMOS memory periphery process.Keywords
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