Monolithic expandable 6 bit 20 MHz CMOS/SOS A/D converter
- 1 December 1979
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 14 (6) , 926-932
- https://doi.org/10.1109/jssc.1979.1051299
Abstract
Standard process CMOS/SOS technology has been applied in the design of a 6 bit parallel 20 MHz A/D converter. Two chips may be interconnected in a series to obtain 7 bit resolution or in parallel to obtain nearly 40 MHz data rates. Design factors and accuracy requirements are reviewed.Keywords
This publication has 6 references indexed in Scilit:
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- Monolithic expandable 6b 15MHz CMOS/SOS A/D converterPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1979
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